The invention is directed to the critical problem of how a switching service program of a central control unit of a computer-controlled switching system can later be fundamentally modified without having to completely cease the handling of newly arising switching jobs for a longer time.
The invention improves the specific method recited in the preamble of patent claim 1 that is disclosed in and of itself by the publication E-A2 135 931 (U.S. Ser. No. 651,954--filed Sept. 19, 1984 now U.S. Pat. No. 4,912,698, hereby incorporated by reference.
This known method is already suitable for program modifications of a highly complex central control unit that controls an especially highly available switching system in an extremely reliable and extremely error-tolerant fashion. An extreme plurality of subscribers, for example 50,000 or 100,000 can already be connected to this known central control unit; their switching jobs are to be reliably handled, namely, disruption-free and optimally error-tolerant. It is also fundamentally suitable for simultaneous control of the many discrete switching functions of connections having different requests, for example, for simultaneous control of an extreme plurality of telephone calls, teleprinter communications, picture telephony calls, etc. The appertaining central control unit that contains many central processors contains all important component parts doubly in redundant fashion in order to enhance its reliability, whereby identical data are usually stored in redundant memories. Usually without any and all disruption of the normal switching operation, respective halves of such redundant component parts can therefore even be split off and be fundamentally interconnected to a relatively large or relatively small special-purpose computer as desired. Thus, parts of the switching service program can be reworked in the special-purpose computer during the switching service, i.e. can be cancelled, overwritten or supplemented. Given a plurality of central processors selected adequately high, for example, sixteen such processors for 50,000 subscribers, the availability of this central control unit remains extremely high. Despite splitting the special-purpose computer off and despite this reworking and program modification that may even last hours, this central control unit--as often required--is down less than, for example, one minute per year, because time-consuming initial starts can usually be avoided despite such reworkings and program modifications.
The afore-mentioned publication, however, does not yet disclose the method of the invention for also reworking the information stored in administration memory areas in order to modify the previously stored information together with the size and the start addresses of address spaces in other memory areas of the central control unit simultaneously for an extremely great plurality of subscribers and/or system component parts. Because the information in the appertaining administration memories are also modified in the invention, the other program parts of the switching system--usually a great number of other program parts--that contain virtual addresses need not be co-modified in the invention in order to achieve the reliability of this switching system given branches from the other program parts into the restructured information/program parts. The invention thus facilitates the modification of all program parts to an extraordinary degree on site directly in the central control unit without sacrificing the availability, even when these program modifications simultaneously relate to an extreme plurality of subscribers and even when modifications of extremely important program parts that are continuously intensely employed are involved.
Address administration units that serve the purpose of converting logical addresses into physical addresses (fundamentally, potentially also for converting physical addresses into logical addresses) are inherently known. German Patent Application P 36 32 608.9 (not yet published discloses such a high-performance, extremely fast address administration unit with its own, appropriately skillfully constructed memory, whereby such address administration units are quite specifically suited for the requirements of the high-performance multi-processors central control unit disclosed in the aforementioned European application. This latter German patent application, moreover, recites nothing about redundancies and EDC-monitored micro-synchronous parallel operation of the memory of such address administration units.
The as yet unpublished German Patent Application P 36 22 369.7 discloses a method for the operation of a central control unit of a switching system, whereby the central control unit contains only two processors that are normally operated in stand-by mode. As soon as a considerable fault appears, in one-half of the redundant, peripheral system components, those malfunctioning switching system components that are peripherally connected to the central control unit and are redundantly provided are split off in such emergency operation times, whereby such peripheral components that are split off respectively contain their own processors and own memories, as do the peripheral components that are not split-off. In emergency running time, one of the two central processors of the central control unit is additionally split-off, whereby this central processor that is split-off reloads the peripherally connected memories of the peripherally connected processors, and whereby--in this emergency running time--the other central processor of the central control unit together with the other, generally intact half of the peripherally connecting switching system components maintains the switching service, insofar as this is possible. As soon as the appertaining, periphery memories of the periphery processors are reloaded by the split-off, central processor, these reloaded periphery memories together with the other switching system components previously split-off assume the switching service instead of the other half of the switching system components, whereby the two processors of the central control unit are subsequently operated in stand-by mode again. This earlier German Patent Application recites nothing about the restructuring of information and quite definitely recites nothing about the restructuring of information that control the central control unit. Accordingly, nothing about the split-off of a special-purpose computer for modifying the information in an administration memory of the split-off half of a central control unit comprising redundant bus system to which many central processors and a redundant, central, main memory are connected is recited therein, either.
In the publication Telcom Report 9 (January/February, 1986), 22-26 (appeared in German on 21 March 1986) equivalent to Telcom Report 1986, No. 6, 304-309 (appeared even later in English), the inventor of the present invention himself essentially described the software aspects in considerable detail for a re-initialization of a telephone switching system digitally controlled by a fundamentally arbitrary central control unit. In this publication, he also rather extensively described software aspects for subsequent modifications of the appertaining switching surface program, partly also software aspects for the restructuring of information about the many subscribers and system components to be semi-permanently stored in the framework of this modification of the switching service program which the central control unit controls. For restructuring these semi-permanently stored information, the previous switching service program parts that are not to be modified are preferably translated out of the machine language (which corresponds to the machine language of the allocated processors and, for example, is only composed of the numerals 0 and 1 in the simplest case) into a MML command language, are then modified as needed and--apparently retranslated into the machine language--are again inserted into the overall packet of the various parts of the switching service programs. In the last paragraph before his "Schlussbetrachtung", it is summarily pointed out in this publication without recitation of hardware details that the one "half" of the central control unit in a "split" central control unit will, in future, be able to continue to control the switching service while the corresponding data block of the switching service program can be modified in the other "half" of the central control unit. This publication recites nothing about administration memories and therefore recites nothing about the advantages of the simultaneous modification of the information stored there. Nothing to the effect that--as in the invention--a split-off special-purpose computer usually does not represent "half" of the central control unit, but is far smaller than this half, i.e., for example, contains only two central processors, is recited therein, either. This publication likewise recites nothing about the normally micro-synchronous parallel operation of all redundant main component parts of a special central control unit constructed in relatively complicated fashion. Accordingly, it also recites nothing about a normally micro-synchronous parallel operation of EDC-monitored memory halves and quite definitely recites nothing about such a monitored parallel operation of the intrinsic memory areas of one or more address administration units. It likewise recites nothing about a special operation of both memory halves in the transition time after the later re-unification of a special-purpose computer and a remaining central control unit.
Certain software aspects--for modifications as well--of a switching service program are recited in extremely general fashion and with correspondingly little reference to appertaining hardware aspects in the publication, Proc. Conf. On Softw. Ing. for Telcomm., Lund, 1983, 98-103.
Authors of other companies likewise report about software aspects, including those for modifications of a switching service program, each more or less referred to specific central control unit hardware structures that are respectively established in their companies: Thus, a presentation at the Internat. Comm. Conf. in Denver 14, June 1981, printed in the publication GTE Autom. Electric J., November/December 1981, Pages 184-187 reported about software aspects, including those given modifications of the switching service program for the structure of that company's so-called GTD-5 EAX-switching system, whereby--see page 187, right-hand column, paragraph 3--the as yet unmodified data remain written in a first memory area that continues to control the previous switching service, whereas the modified data are written into a different memory area. Here, too, the modifications are executed in a higher command language. It is not set forth in detail how the hardware shift of the central control unit to the new, modified switching service program is carried out. Above all, the split-off of a redundant memory half is also not suggested herein, let alone the split-off of a redundant, normally micro-synchronously, parallely operated, inherently EDC-monitored memory half, even not in view of a memory of an address administration unit, let alone the specific fashion of how such memory halves continue to work in the transition time following a re-unification of a split-off special-purpose computer and a remaining central control unit until the normal parallel operation of the two memory halves.
Software aspects of a switching service program for the structure of the so-called AXE 10 switching system are described in the publication, Ericcson Review, 1985 No. 1, Pages 2-10, with reference to the specific central control unit established therein, namely, in view of modifications of the switching service program beginning with page 8, right-hand column. Nothing is recited therein about the utilization of the split-off possibility of a redundant memory half, i.e. likewise nothing about the split-off of normally micro-synchronously, parallely operated, EDC-monitored memory halves, let alone about a memory of an address administration unit. A specific fashion as to how one is to proceed given a re-unification of a split-off special-purpose computer and of a remaining central control unit is suggested therein, either.
The publications, AT&T Bell Lab. Rec. April 1984, pages 26-33 (for the so-called 5-ESS-Switching System), Elektr. Nachrichtenw. 59 (1985), No. 1/2, Pages 60-67 (for the so-called System 12, and commut. & transmission 1986, No. 2, Pages 5-16 (for the so-called E-10-MT-Switching System), likewise describe softwave aspects for modifications of switching service programs, but without clear reference to a split-off of a memory section half of redundant memories. The split-off of normally microsynchronously, parallely operated, EDC-monitored memory halves is definitely not suggested, let alone in view of a memory of an address administration unit. Likewise, the operation of the central control unit in the transition time after a re-unification of a split-off special-purpose computer and of a remaining central control unit is not described.
The publication E-A2 141 245 corresponding to U.S. Ser. No. 651,954--filed Sept. 19, 1984 now U.S. Pat. No. 4,912,698, hereby incorporated by reference discloses a method for a redundant memory that usually stores identical data in each half and that is employed in a multi-processor central control unit of a switching system. As a result of this method, the memory checks itself on the basis of a EDC code and, with a special, automatically corrects and up-dates the digits erroneously stored in one of the memory halves. The memory content of the memory half that previously stored faultily is thereby directed little by little, whereby all information in the memory half that previously stored faultily where simultaneously additional up-dated--corresponding to the new entries carried out in the "intact" memory half in the meantime. These corrections, including up-datings of the information that were implemented in the memory half that previously stored faultily, largely ensue during the operating pauses--which are respectively usually very short--wherein a normal read-write operation need not be carried out in this memory area. The corrections and up-datings, namely, ensue in that, namely completely automatically,
first, the intact memory content of the intact memory half is copied stage-by-stage into the previously faultily storing memory half under identical addresses during the operating pauses of this memory half in which no normal read operation or write operation initiated by other system components is carried out;
in that, on the other hand, reading is only undertaken out of the intact memory half (this assuring error-free switching operation) during the normal read operation that is initiated by other system components--for example, subscribers--and that is implemented between those operating pauses utilized for copying, this being capable of being achieved, for example, by disconnecting the signal outputs of the faultily storing memory half during this reading; and
that--in normal write operation that is initiated by other system components, for example subscribers--the data to be entered are immediately and simultaneously written into both memory halves under identical addresses (as a result whereof the up-dating of all stored data is achieved.
Only when all data in both memory halves have been made identical by copying ore the two memory halves again operated micro-synchronously, parallely EDC-monitored like normal, apart from a potential, permissible chronological slippage.